The invention relates to circuitry for generating sums, especially scalar products, with a summing unit which, on the input side, is connected via an exponent-controlled mantissa positioner to a multiplication unit which delivers products in floating-point representation, this consisting of a product mantissa, a product sign and a product exponent, and which, on the output side, delivers to an interface via a result positioner a controlled rounded result mantissa and a result sign and via an exponent generator a result exponent, possibly an overflow or underflow flag, the length of an accumulator register of the summing unit corresponding to at least the length of the product mantissa and the difference between the largest and smallest product exponents.